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AMD'S AM2 socket will "evolve" to AM2+ in Q3 2007. The AM2+ will include support for the latest greatest Hypertransport 3, scoring with 4.0 to 4.4 GT/s where the exact speed depends on the north bridge frequency.
The AM2+ CPUs are backward compatible with the existing AM2 CPUs and even the new AM2+ CPUs scheduled for 2007 announcement should work in the previous boards, but not at full speed.
They will have to depend on HT 2 not on HT 3 and even today's CPUs will work on future AM2+ platforms.
AM3 is now scheduled for the second half of 2008. AMD claims that it has delayed the AM3 plans as the cross over to DDR 3 won't happen until the middle of 2009 while AM3 "will be on time" before the big crossover happens. This also squares with AMD's planned 45 nanometre production. It is safe to claim that at least some of AM3 CPUs will be 45 nanometre.
AM2+ and the 2007 cores will introduce TSI for fan control. TSI, which stands for "Thermal Sense Interface", is much more accurate than the current thermal diode and will ultimately save costs. It will be part of future south bridges and Super I/O.
The AM2+ CPUs are backward compatible with the existing AM2 CPUs and even the new AM2+ CPUs scheduled for 2007 announcement should work in the previous boards, but not at full speed.
They will have to depend on HT 2 not on HT 3 and even today's CPUs will work on future AM2+ platforms.
AM3 is now scheduled for the second half of 2008. AMD claims that it has delayed the AM3 plans as the cross over to DDR 3 won't happen until the middle of 2009 while AM3 "will be on time" before the big crossover happens. This also squares with AMD's planned 45 nanometre production. It is safe to claim that at least some of AM3 CPUs will be 45 nanometre.
AM2+ and the 2007 cores will introduce TSI for fan control. TSI, which stands for "Thermal Sense Interface", is much more accurate than the current thermal diode and will ultimately save costs. It will be part of future south bridges and Super I/O.
Source: http://www.theinquir...x?article=35211
